From: Daniel Baluta <daniel.baluta@gmail.com>
To: Shengjiu Wang <shengjiu.wang@nxp.com>
Cc: shengjiu.wang@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com,
nicoleotsuka@gmail.com, lgirdwood@gmail.com, broonie@kernel.org,
perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
linux-sound@vger.kernel.org
Subject: Re: [PATCH v2] ASoC: fsl_sai: Fix channel swap issue on i.MX8MP
Date: Tue, 19 Dec 2023 10:31:00 +0200 [thread overview]
Message-ID: <CAEnQRZDHrihcP5TGLWKTYW=C27XSrBis7pLd2nMrQ2byJQhAJg@mail.gmail.com> (raw)
In-Reply-To: <1702953057-4499-1-git-send-email-shengjiu.wang@nxp.com>
On Tue, Dec 19, 2023 at 5:12 AM Shengjiu Wang <shengjiu.wang@nxp.com> wrote:
>
> When flag mclk_with_tere and mclk_direction_output enabled,
> The SAI transmitter or receiver will be enabled in very early
> stage, that if FSL_SAI_xMR is set by previous case,
> for example previous case is one channel, current case is
> two channels, then current case started with wrong xMR in
> the beginning, then channel swap happen.
>
> The patch is to clear xMR in hw_free() to avoid such
> channel swap issue.
>
> Fixes: 3e4a82612998 ("ASoC: fsl_sai: MCLK bind with TX/RX enable bit")
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Baluta <daniel.baluta@gmail.com>
To: Shengjiu Wang <shengjiu.wang@nxp.com>
Cc: alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org,
Xiubo.Lee@gmail.com, shengjiu.wang@gmail.com, tiwai@suse.com,
lgirdwood@gmail.com, linux-sound@vger.kernel.org, perex@perex.cz,
nicoleotsuka@gmail.com, broonie@kernel.org, festevam@gmail.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] ASoC: fsl_sai: Fix channel swap issue on i.MX8MP
Date: Tue, 19 Dec 2023 10:31:00 +0200 [thread overview]
Message-ID: <CAEnQRZDHrihcP5TGLWKTYW=C27XSrBis7pLd2nMrQ2byJQhAJg@mail.gmail.com> (raw)
In-Reply-To: <1702953057-4499-1-git-send-email-shengjiu.wang@nxp.com>
On Tue, Dec 19, 2023 at 5:12 AM Shengjiu Wang <shengjiu.wang@nxp.com> wrote:
>
> When flag mclk_with_tere and mclk_direction_output enabled,
> The SAI transmitter or receiver will be enabled in very early
> stage, that if FSL_SAI_xMR is set by previous case,
> for example previous case is one channel, current case is
> two channels, then current case started with wrong xMR in
> the beginning, then channel swap happen.
>
> The patch is to clear xMR in hw_free() to avoid such
> channel swap issue.
>
> Fixes: 3e4a82612998 ("ASoC: fsl_sai: MCLK bind with TX/RX enable bit")
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
next prev parent reply other threads:[~2023-12-19 8:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-19 2:30 [PATCH v2] ASoC: fsl_sai: Fix channel swap issue on i.MX8MP Shengjiu Wang
2023-12-19 8:31 ` Daniel Baluta [this message]
2023-12-19 8:31 ` Daniel Baluta
2023-12-19 16:05 ` Mark Brown
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